Vertical deflection is controlled in television receivers by vertical deflection circuits, in which a pulse generator is synchronized by the video signals. The pulses so obtained are then applied to the deflection system over a pulse transfer and wave-shaping stage, a driver stage, and a final or power or output stage.
A vertical deflection circuit of the type to which the present invention relates is described, for example, is German Disclosure Document DT-OS No. 2,355,872, which shows a transistorized vertical deflection circuit which is so arranged that the pulses are stabilized. It has been found that this type of vertical deflection circuit has some disadvantages; the transistors are operated at high voltage and can be destroyed if excessive voltages occur resulting in voltage flash-over. The output power transistors have to be supplied already with substantial power, resulting in poor efficiency of the overall deflection circuit.
An other known vertical deflection circuit as shown, for example, in U.S. Pat. No. 4,085,544, Hoferl (assigned RCA) avoids the difficulties above referred-to by utilizing the energy contained in the line retrace or line flyback. A portion of this energy delivered by the line deflection power or output stage is utilized in order to supply the current to the vertical deflection system, typically the vertical deflection coils. The vertical deflection coils then utilize a controlled saw-tooth wave generator having two thyristors which control charge and reverse re-charge of the capacitor. This saw-tooth wave generator with the two thyristors and the capacitor is connected in advance of the output stage of the vertical deflection circuitry. Unfortunately, this vertical deflection circuit also has some disadvantages.
If the vertical deflection coils have a high impedance, the final or output stages must supply a voltage at a high level. This, in turn, results in high transient loading of voltage change with respect to time at the terminals of the thyristors. These high and rapidly occurring changes in voltage result in a comparatively long recovery time of the thyristors. Under certain conditions, the thyristors cannot recover until the next trigger pulse appears and it is then no longer possible to trigger the thyristors as commanded. This results in interference and disturbances and possibly even failure of vertical deflection. Additionally, the thyristors can be destroyed or damaged due to overloading.
It is an object of the present invention to utilize the advantages of the circuit of U.S. Pat. No. 4,048,544 without incurring the disadvantages, and which is suitable for operation with high-resistance vertical deflection coils having high impedance. The vertical deflection circuit should operate even under high voltage loading and high transient voltage loading, and permit triggering of the thyristors reliably and unambiguously.